Ultra low power analog circuits enabling the Internet of Things
Tutor: Prof. Salvatore Pennisi
The activity envisages the design of CMOS operational transconductance amplifiers operating in subthreshold regime and exploiting the bulk terminal to minimize the energy consumption of analog signal acquisition interfaces in ultra low power applications.
Study cycle:
post graduate
Languages skills required:
English B1
Length:
2 months
Period:
second semester
Summer traineeships:
no
Research centre/company involved:
Lab: Microelectronic Design laboratory http://www.dieei.unict.it/it/corsi/lm-29/aule-e-laboratori
Insurance:
Accident insurance during working hours only and Liability insurance
Benefits:
none
Traineeship type:
non Erasmus placement
A.Y.:
2019-2020